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The University of Manchester is inviting applications for a Post-Doctoral Research Associate to lead the design of next-generation vision processor hardware. This role focuses on near-sensor
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circuits must be mapped carefully to hardware topology while retaining useful observables. The project addresses this by combining circuit co-design for Google's Willow processor, and classical benchmarking
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<span lang="en">TUD Dresden University of Technology</span> | Dresden, Sachsen | Germany | 8 days ago
SystemC and field-programmable gate arrays (FPGAs)
- developing machine learning methods to identify suitable computational kernels and optimize their placement within the processor memory
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application development techniques (programming models, algorithms, software) at scale (large processor counts). Excellent interpersonal skills, oral and written communication skills, organizational skills
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nonlinear, and the circuits must be mapped carefully to hardware topology while retaining useful observables. The project addresses this by combining circuit co-design for Google's Willow processor
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calibrations and characterization measurements of the quantum processor unit according to the specifications of the manufacturer. Ensure the functioning of the quantum computer and its hardware upgrades
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the quantum processor unit according to the specifications of the manufacturer. Ensure the functioning of the quantum computer and its hardware upgrades and firmware updates. Engage in international
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processor selection to PCB design, FPGA/MCU implementation, firmware development, hardware debugging, and deployment of signal-processing and machine-learning algorithms. A significant part of the position
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processor memory hierarchy contributing, administrating and reporting in (inter-)national research and development projects publishing and presenting results at international conferences close