Sort by
Refine Your Search
-
Listed
-
Category
-
Country
-
Program
-
Employer
- imec Japan Co., Ltd.
- Nanyang Technological University
- Ghent University
- Stony Brook University
- University of Arkansas
- University of Colorado
- Biophysical and Biomedical Measurement Group, National Institute of Standards and Technology
- Boise State University
- CNRS
- California Institute of Technology
- California State University, Northridge
- Delft University of Technology (TU Delft)
- Dipartimento di Ingegneria dell'Informazione - Università degli studi di Padova
- Fondazione Bruno Kessler
- Forschungszentrum Jülich
- Georgetown University
- Heriot Watt University
- IMEC
- Institut de Físiques d'Altes Energies (IFAE)
- Instituto de Telecomunicações
- KU LEUVEN
- National Taiwan University
- Northeastern University
- Politecnico di Milano
- Rochester Institute of Technology
- SUNY University at Buffalo
- The California State University
- UNINOVA - Instituto de Desenvolvimento de Novas Tecnologias
- Universitat de les Illes Balears
- University of California Los Angeles
- University of California, Los Angeles
- University of Illinois
- University of New Mexico
- University of Texas at Arlington
- University of Texas at Austin
- University of Twente (UT)
- University of Utah
- 27 more »
- « less
-
Field
-
VisualFab. Virtual Wafer Fabrication (VWF) simulations will first provide in-depth coverage of process simulation, followed by simulating a given CMOS process recipe and study profiles and layer structures
-
). Desirable additional qualifications: Experience with CMOS technologies or neuromorphic devices Experience in scientific publishing and presenting research at international conferences Ability to work
-
of the following areas: thin films (deposition, etching, metrology), semiconductor materials & device physics, CMOS processing & fabrication, neuromorphic/AI semiconductor devices and circuits, memory
-
, logic synthesis, functional verification and power-performance optimisation for CMOS technology. The position is framed within the following research areas on the project: (i) Designing and implementing
-
is dedicated to the pursuit of health equity. Learn more: https://hospital.uillinois.edu/about-ui-health This position is intended to be eligible for benefits . This includes Health, Dental, Vision
-
PhD in the IC Design Group! We have access to advanced CMOS fabrication technology nodes and a well-equipped laboratory for evaluation of test-chips. We offer a very collaborative atmosphere and you
-
for Secure Digital Systems Using Hybrid Technologies: Printed Electronics and CMOS”, funded by (Operation code no. LISBOA2030-FEDER-00816400), co-funded by the European Regional Development Fund (FEDER) and
-
conventional CMOS technology cannot be directly transferred and must be re-evaluated in the context of flexible electronics. The key application is to design flexible chips for low-power and side-channel
-
the PIONEER-PON project, a co-promoted national R&D initiative developing the first European pluggable OLT based on PIC and CMOS ASIC technology for converged passive optical networks (GPON/XGS-PON
-
Medical Officer on call Determines capacity status and discusses status with CMO. Notifies appropriate leaders and departments of status changes Serves as resource for all nursing staff Manages requests