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optimization engines for memory-aware deployment, compiler and runtime systems capable of supporting dynamic neural network topologies, energy-efficient embedded AI frameworks targeting RISC-V multicore and
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of the following tasks: Development of digital signal processing (DSP) algorithms and subsystems for optical communications, including support to multicore fiber transmission; Implementation of the developed DSP
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systems. The following experience will strengthen your application: Knowledge on embedded system, DSP, and multicore processor. Spirit and personal skill for collaboration with colleagues and industrial
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hardware architectures (multicore, GPUs, FPGAs, and distributed machines). In order to have the best performance (fastest execution) for a given Tiramisu program, many code optimizations should be applied