Young Graduate Trainee in the Data Systems, Microelectronics and Component Technology Division

Updated: about 2 months ago

Young Graduate Opportunity in the Directorate of Technology, Engineering and Quality

ESA is an equal opportunity employer, committed to achieving diversity within the workforce and creating an inclusive working environment. We therefore welcome applications from all qualified candidates irrespective of gender, sexual orientation, ethnicity, beliefs, age, disability or other characteristics. Applications from women are encouraged.

This post is classified F1 on the Coordinated Organisations’ salary scale .

Location

ESTEC, Noordwijk, Netherlands 


Our team and mission

The Data Systems, Microelectronics and Component Technology Division carries out all the tasks related to ESA project support and technology development activities in its area of responsibility. This includes on-board computers and data-handling systems (such as mass memories and instrument control units) for payloads and platforms, microelectronics (such as FPGAs and ASICs), Artificial Neural Networks, AI and Machine learning, cubesat activities, wireless technologies and all technologies related to the EEE component family (such as Si, photonics, passives). In terms of technology development, we seek to develop state-of-the-art technologies to support future ESA space missions in space science, Earth observation, human spaceflight, telecommunication, navigation, space transportation, operations and space engineering and technology.

The candidate will be integrated into the Data Systems, Microelectronics & Component Technology Division at ESTEC and will collaborate with both the On-Board Computer & Data Handling Section and the Microelectronics Section.


The On-Board Computer & Data Handling Section provides functional support to ESA projects and carries out technological research (R&D) what concerns turn-key on-board HW Data Handling and processing solutions with emphasis on:

  • platform and payload data handling architectures and their building blocks (equipment/units, modules and key components);
  • units such as on-board computers, mass memories, remote terminals, instrument control units*;
  • digital and analogue signal processing electronics for payload/platform functions;
  • front-end acquisition and processing chain electronics*;
  • on-board data transfer interfaces, buses and associated protocols (high and low speed);
  • platform data handling functions related to security, data authentication, encryption, compression;
  • use of microelectronics devices;
  • implementation, inference, verification and validation of algorithms** on processing HW platforms for space applications* in close collaboration with other discipline experts (software, microelectronics and applications engineers).

The Microelectronics Section’s core responsibilities cover technical support for ESA missions and research activities in the areas of:

  • digital and analogue integrated circuit (application-specific integrated circuit (ASIC), field programmable gate array (FPGA), microprocessor) and intellectual property (IP) core developments for space applications;
  • tools and methods for the development of integrated circuits (from specifications to tested devices);
  • radiation mitigation techniques for ASIC and FPGA.


* except for RF payloads. ** including Artificial Intelligence and Machine Learning algorithms.

You are encouraged to visit the ESA website: www.esa.int/ESA
https://www.esa.int/Enabling_Support/Space_Engineering_Technology/Microelectronics
https://www.esa.int/Enabling_Support/Space_Engineering_Technology/Onboard_Computers_and_Data_Handling


Field(s) of activity/research for the traineeship

As a Young Graduate Trainee within the Data Systems, Microelectronics and Component Technology Division, you will work on a subset of objectives based on the various activities outlined below and tailored to your technical background and professional development preferences:

  • Investigate the frameworks available for efficiently implementing various neural network architectures (Convolutional Neural Networks, Recurrent Neural Networks) on FPGAs or System-on-chip (SoC) devices or Neuromorphic Processor IP. Conduct a comprehensive analysis of existing design methodologies and propose novel tools or adaptations to existing tools that streamline the generation of efficient neural networks for space-qualified FPGAs or SoC. Include a solution for translating neural networks into hardware description languages (HDLs). Demonstrate the chosen methodology through a laboratory demonstrator;
  • Explore the cutting-edge advancements in artificial intelligence (AI) application execution on RISC-V-based processors or FPGAs (e.g., PolarFire). Formulate an effective strategy to implement these AI applications, guided by a RISC-V processor model simulated in a virtual platform. Prototype the proposed solution on a commercial board equipped with an RISC-V processor and an accompanying FPGA;
  • Assess the potential of Digital Neuromorphic Processor (DNP) extensions and explore their integration into RISC-V-based SoCs. Evaluate the suitability of DNP extensions for accelerating AI applications and their compatibility with RISC-V architectures. Explore techniques for integrating DNP extensions into RISC-V SoCs, considering performance, power efficiency, and resource utilization;
  • Conduct thorough evaluations of AI-based applications on specific platforms using dedicated benchmarks (e.g., OBPMark-ML). Analyze the performance metrics, resource utilization, and energy consumption of these applications to assess their suitability for space applications. Identify areas for optimization and propose enhancements;
  • Investigate the state-of-the-art implementations of sophisticated signal processing algorithms (including Artificial Intelligence/Machine Learning-based algorithms) for space science, Earth observation, and telecommunications applications. Employ high-level synthesis techniques to achieve bandwidth efficiency, energy optimization, and robustness in these algorithms. Utilize the next-generation space signal processing platform, encompassing the latest analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and FPGAs designed for space applications;
  • Investigate the integration of AI algorithms into space-based communication systems. Analyze the challenges and opportunities associated with incorporating AI into these systems, considering factors such as real-time processing, low latency, and adaptability to varying communication environments. Propose novel AI-based solutions to enhance the performance, reliability, and security of space-based communication systems;
  • Explore the application of AI in FDIR and Navigation systems. Investigate how AI algorithms can be employed to improve the accuracy, efficiency, and robustness of FDIR and navigation systems. Evaluate the potential of AI for enhancing FDIR performance, reducing the impact of interference, and mitigating unknown unknowns.

Technical competencies

Knowledge of relevant technical domains

Relevant experience gained during internships/project work

Breadth of exposure coming from past and/or current research/activities

Knowledge of ESA and its programmes/projects


Behavioural competencies

Result Orientation

Operational Efficiency

Fostering Cooperation

Relationship Management

Continuous Improvement

Forward Thinking


Education

You should have just completed, or be in the final year of your master’ s degree in Physics, Microelectronics, Electronics or equivalent.


Additional requirements

You should have good interpersonal and communication skills and should be able to work in a multicultural environment, both independently and as part of a team.

Specific competence in one of the following disciplines shall be considered an asset:

  • Experience with AI development frameworks (Tensorflow, PyTorch);
  • Implementation, inference, training, verification and validation of machine learning algorithms on HW platform (for space or terrestrial applications);
  • Experience with hardware description languages or modelling software;
  • Experience with microelectronics development tool flow;
  • Design, build and test of analogue and digital electronic boards.

The working languages of the Agency are English and French. A good knowledge of one of these is required. Knowledge of another Member State language would be an asset.

During the interview motivation and overall professional perspective/career goals will also be explored.


Other information

For behavioural competencies expected from ESA staff in general, please refer to the ESA Competency Framework .

For further information on the Young Graduate Programme please visit: Young Graduate Programme andFAQ Young Graduate Programme

At the Agency we value diversity and we welcome people with disabilities. Whenever possible, we seek to accommodate individuals with disabilities by providing the necessary support at the workplace. The Human Resources Department can also provide assistance during the recruitment process. If you would like to discuss this further please contact us email [email protected] .

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Please note that applications are only considered from nationals of one of the following States: Austria, Belgium, the Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy, Luxembourg, the Netherlands, Norway, Poland, Portugal, Romania, Spain, Sweden, Switzerland, and the United Kingdom. Nationals from Latvia, Lithuania, Slovakia and Slovenia, as  Associate Member States, or Canada as a Cooperating State, can apply as well as those from Bulgaria, Croatia and Cyprus as European Cooperating States (ECS).

According to the ESA Convention, the recruitment of staff must take into account an adequate distribution of posts among nationals of the ESA Member States*. When short-listing for an interview, priority will first be given to candidates from under-represented Member States *. 

In accordance with the European Space Agency’s security procedures and as part of the selection process, successful candidates will be required to undergo basic screening before appointment conducted by an external background screening service. 

*Member States, Associate Members or Cooperating States.



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