Design for Test Methodology Researcher

After a half-century of continuous down-scaling of feature sizes and simultaneous up-scaling of transistor counts and device complexity, consumers of integrated-circuit (IC) technology have grown accustomed to the benefits of “Moore’s Law” and expect it to continue going forward. For micro-electronic products, mankind simply feels entitled to ever higher performance, at lower energy consumption, and certainly at lower cost. Imec is a world-renowned research organization that develops state-of-the-art device and system integration technologies. This results in components with advanced functionalities and form factors which, in turn, require continuous innovation in test technology and design-for-test methodology. To drive these activities, we are looking for a Test/Design-for-Test Technology Researcher.

You work in a team of about ten people but share and provide your expertise to the broader imec community, working with not only with internal researchers and scientists, but also hardware engineers, device and process experts, but also from our customers (‘partners’) and suppliers.

As a researcher, you will contribute to conceiving and developing (design-for-)test methodologies adapted to new technologies for device integration and chip manufacturing, such as 2nm CMOS technologies, 3D chip stacking, and silicon photonics. You will collaborate with top-experts in the field, apply your methodologies to state-of-the-art chip designs that can be manufactured in one of imec’s own cleanrooms or at external fabs, if applicable file for patents, and publish your findings at key conferences and journals. You apply your knowledge in imec’s research programs, as well as in bilateral projects with customers, joint development projects with suppliers, and/or multi-party EU-funded projects.