Sort by
Refine Your Search
-
Listed
-
Category
-
Program
-
Employer
-
Field
-
within a Research Infrastructure? No Offer Description Internship proposition (2/3 months): Covert Antennas on FPGA Requirements Additional Information Website for additional job details https
-
and documentation of security IPs then their integration into RISC-V processors emulated on FPGA. • Verification of CPU operation before and after integration of countermeasures. • Development
-
, these modules will be emulated by RF FPGA boards designed at the beginning of the project. The first objective of the project will therefore be to propose a very low cost wireless link without analog components
-
considered such as extending our available FPGA-based platform for wireless communications or adopting existing similar platforms from our academic and industrial partners within the PEPR Networks
-
1. Novel methods for life cycle analysis of embedded systems. System ecodesign requires precise information of the impacts of system design decisions (types of CPU/GPU, FPGA, memory, busses
-
of the position The goal is to investigate the side-channel vulnerabilities of DL systems in heterogeneous reconfigurable platforms (MPSoC-FPGAs) and to design secure accelerators against SCA attacks. We focus
-
, in particular for channel coding. - Mastery of simulation tools (MATLAB/Simulink) and programming (Python/C++). - Practical experience with embedded systems, memory technologies and FPGAs. - Ability
-
: image processing, statistical signal processing, information geometry, sparse signal processing, generative AI, unsupervised and meta learning, radar, GPU and FPGA, Arm processor. Research Group • ENSTA
-
(alone or in an array, possibly in association with FPGAs). The aim of the project is to develop tools for analyzing/processing the signal from these detectors, so as to increase the number of molecules
-
design tools such as simulation, synthesis, and place-and-route tools. • Experience in working with FPGA or ASIC design flows. • Knowledge of design for test (DFT) techniques and design for debug (DFD