8 Mar 2024
Job Information
- Organisation/Company
CentraleSupélec- Research Field
Computer science » Computer architecture- Researcher Profile
Recognised Researcher (R2)
First Stage Researcher (R1)- Country
France- Application Deadline
31 May 2024 - 00:00 (UTC)- Type of Contract
To be defined- Job Status
Negotiable- Is the job funded through the EU Research Framework Programme?
Not funded by an EU programme- Is the Job related to staff position within a Research Infrastructure?
No
Offer Description
We open 1 PhD/Postdoc position at CentraleSupélec /IETR in Rennes on Side-Channel Resistant DNN Hardware Accelerators, framed in the ANR JCJC project ATTILA (young investigators grant from the French national research agency)
You will integrate the IETR laboratory in Rennes and work with members from the ASIC team and the SUSHI of IRISA /Inria . We are part of a larger
collaborative environment with researchers in Rennes and Nantes working on DL hardware and hardware/software security.
Objectives of the position
The goal is to investigate the side-channel vulnerabilities of DL systems in heterogeneous reconfigurable platforms (MPSoC-FPGAs) and to design secure accelerators against SCA attacks.
We focus on Approximate Computing (AxC) implementations and its security implications. Hence, we aim to understand the interplay between AxC techniques, side-channel vulnerabilities, and defense mechanisms. Although the focus is on SCA attacks exploiting power consumption or EM emanations, the candidate can explore other side-channel vulnerabilities, too.
We welcome candidates with different backgrounds and interests, e.g., on hardware and architecture (FPGAs, hardware security, secure accelerators and microarchitecture, microcontrollers) or on computer science/mathematics (side-channel analysis, cryptanalysis, artificial intelligence). Depending on the background, the research directions to explore include, but are not limited to:
- DNN implementation, side-channel evaluation, and discovery of vulnerabilities. Extend our current setup to implement further DNN models in FPGAs (or microcontrollers) leveraging AxC techniques, and evaluate side-channel leakage and vulnerabilities under different settings.
- Implementation of countermeasures. Study the existing countermeasures in the literature and propose new ones leveraging AxC and other techniques to be explored.
- Advanced side-channel analysis techniques and evaluation methodologies. Study the literature on analysis techniques and attacks to propose and implement new side-channel evaluation methodologies adapted to the context of DNNs (recovery of parameters/inputs, reverse-engineer models or hardware accelerators, discovery of new vulnerabilities, etc.).
The position offers a path to complete a Ph.D. in an important emerging field and the chance to set up and develop their own research agenda for postdoc candidates.
Details
- Duration:Ph.D. full 3-year thesis, and Postdoc 2 years with possibility of extension.
- Start date: Flexible during 2024, ideally Ph.D. Oct./Nov., and Postdoc as soon as possible.
- Benefits package:
- Social Security coverage
- Subsidized meals
- Partial reimbursement of public transport costs
- Paid holiday leave
- Accommodation facilities available on campus
- Access to vocational training, social, cultural, and sports facilities and activities
Candidates profile
- Graduate (Master 2 or 5th year Eng.) or Ph.D. in Computer/Electrical Engineering, Computer Science, Microelectronics, Embedded Systems. You have a strong background in at least one of the following domains:
- Side-channel attacks, side-channel analysis and evaluation methodologies, cryptanalysis
- Other HW/SW security
- Design for FPGA/SoC-FPGA and hands-on experience in prototyping and implementations
- Implementation of DNN/CNN in FPGAs and/or other accelerators/systems
- Machine Learning/Artificial Intelligence (PyTorch, TensorFlow, TFLite...)
Other interesting skills:
- Programming in C/C++/Python
- Use of Linux/Git as development environment
- Good use of laboratory instruments (oscilloscopes, power supplies, etc.)
You can speak, write, and read English at a professional level (french language is not required).
How to apply
Please send an email to the contacts indicated below with the following information:
- Your CV
- Reference letter/s from previous supervisors
- Copies/links to reports/papers/repositories showing your experience
- Postdoc:
- Motivation letter and research statement (4 pages max)
- Your Ph.D. thesis manuscript
- Ph.D.:
- Motivation letter
- Bachelor/Master transcripts
Please do not hesitate to contact us for further details and information.
Contacts:
- Rubén Salvador: [email protected]
- Maria Méndez Real: [email protected]
- Jean-Christophe Prévotet: [email protected]
- Amor Nafkha: [email protected]
Deadline: Interviews will start as applications arrive and run until filling the positions.
Requirements
Additional Information
- Website for additional job details
https://www.hipeac.net/jobs/14579/1-phdpostdoc-positions-on-deep-learning-hardw…
Work Location(s)
- Number of offers available
- 2
- Company/Institute
- CentraleSupélec
- Country
- France
- City
- Rennes
- Geofield
Where to apply
- Website
https://rsalvador.org/assets/pdf/ATTILA_PhD_PD_call_2024.pdf
Contact
- City
Gif-sur-Yvette- Website
https://www.centralesupelec.fr/
https://twitter.com/centralesupelec
STATUS: EXPIRED