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discipline. 2. Have or be about to obtain, a PhD in a relevant subject. 3. Have relevant research experience in either embedded systems design or FPGA or ASIC hardware design, along with demonstrable expertise
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on the design and experimental characterization of Application-Specific Integrated Circuits (ASICs), devices, and systems for the detection, spectroscopy, and imaging of radiation and particles, applicable
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projects. Digital VLSI and AI Hardware Systems Key research areas: ASIC/FPGA design flows; AI/edge accelerators; hardware–software co-design; modern SoC architectures; verification and architecture
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Multiple Tenure-Track Assistant Professor Positions in Microelectronics, Circuits and Systems Design
laboratory modules; mixed-signal design projects. Digital VLSI and AI Hardware Systems Key research areas: ASIC/FPGA design flows; AI/edge accelerators; hardware–software co-design; modern SoC architectures
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projects. Digital VLSI and AI Hardware Systems Key research areas: ASIC/FPGA design flows; AI/edge accelerators; hardware–software co-design; modern SoC architectures; verification and architecture
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of the position Location: this position will take place at IETR laboratory (UMR 6164 CNRS) on the Beaulieu campus of the University of Rennes, France. The candidate will join the ASIC and VAADER teams. Salary
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Multiple Tenure-Track Assistant Professor Positions in Microelectronics, Circuits and Systems Design
laboratory modules; mixed-signal design projects. Digital VLSI and AI Hardware Systems Key research areas: ASIC/FPGA design flows; AI/edge accelerators; hardware–software co-design; modern SoC architectures
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School graduates over a thousand students who are ready to take on great ambitions and challenges. For more details, please view: https://www.ntu.edu.sg/eee We are looking for a Research Fellow to focus
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. The activity includes the design of multi-channel ASICs in scaled technologies to meet the requirements of parallelism and miniaturization, and the engineering of entire analog-digital electronic platforms
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laboratory characterization of the ASIC and its photonic interfaces; Support thermal and electrical validation of the physical form factor (SFP56/SFP-DD); Lead the Test & Measurement effort for functional