1 asic-phd PhD positions at CNRS

M/F PhD offer on Spike Sorting algorithm implementation on Hybrid FPGA/ASIC platform for next generation of Brain Computer interfaces

CNRS | Villeneuve la Garenne, le de France | France | 3 months ago

through the EU Research Framework Programme? Not funded by a EU programme Is the Job related to staff position within a Research Infrastructure? No Offer Description This PhD project will be carried out