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related areas. EVALUATION CRITERIA The selection will be based on the following criteria: Integrated circuit design courses (30%) Experience with DVFS for RISC-V, LoRaWAN and RTL design (60%) Academic
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Portuguese. Candidates who submit their application incorrectly or who do not prove the requirements required in this public notice are excluded from admission. In case of doubt, the evaluation panel may
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tests inserted in a loop with activation by digital commands as well as by direct reading of amplified voltages and currents. Preparation/Elaboration of laboratory guides for testing different typical
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the following conditions: OBJECTIVES | FUNCTIONS This project aims to design methods that make distributed training of multimodal models more efficient. The scholarship holder will examine how the architecture
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do not prove the requirements required in this public notice are excluded from admission. In case of doubt, the evaluation panel may demand any candidate to present documents proving those statements
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translates into English a document previously presented in Portuguese. Candidates who submit their application incorrectly or who do not prove the requirements required in this public notice are excluded from