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Programme? Other EU programme Reference Number 2026-2027_1_124 Is the Job related to staff position within a Research Infrastructure? No Offer Description A contract for a VLSI designer on the following
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research in one or more of the following areas: analog and mixed-signal integrated circuits; digital VLSI and AI hardware systems; advanced packaging and heterogeneous integration; and power electronics and
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Multiple Tenure-Track Assistant Professor Positions in Microelectronics, Circuits and Systems Design
teach and lead research in one or more of the following areas: analog and mixed-signal integrated circuits; digital VLSI and AI hardware systems; advanced packaging and heterogeneous integration; and
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through coursework and projects during his/her studies. 6. At least 5 strong publications as the first authors in top conferences and journals, IEDM and VLSI Symposium. 7. Excellent academic track
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, particularly in leading venues such as IEEE ISSCC, VLSI Symposium, ESSCIRC, IEEE JSSC, and IEEE TCAS-I. 7. Ability to work independently and as part of a team on research programmes. Desirable criteria 1
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machine learning, robotics, embedded and cyber-physical systems, communications and networking, signal processing, semiconductor and VLSI design, quantum computing, and emerging hardware technologies
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conditions and materials properties. • Prepare manuscripts for top-tier venues (IEDM, VLSI, Nature journals) and present results at international conferences. • Mentor graduate and undergraduate students
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Transfer Languages (RTL) such as Verilog/VHDL, Very Large Scale Integrated Circuits (VLSI), and antenna design. Demonstrated experience with analysis and interpretation of results of processing digital
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. Incumbent is also responsible for the administration of several other research grants from both government and industry associated with the Center's director in his parallel role as the head of the VAST (VLSI
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for the administration of several other research grants from both government and industry associated with the Center's director in his parallel role as the head of the VAST (VLSI architecture synthesis & technology