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began as a small college for teachers. Today Humboldt has grown into a comprehensive university with rigorous science and liberal arts programs. Designated a polytechnic in 2022, Cal Poly Humboldt
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foster innovation, creativity, and imagination by facilitating and preserving access to scholarship and information, providing expert consultation in the research process, and actively teaching the
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Network Engineer (Network and Communications Analyst IV, Range 1) - San Francisco Bay Region Network
to comply with the requirements set forth in CSU Executive Order 1083 as a condition of employment. This position may be a "designated position" in the California State University's Conflict of Interest Code
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Date Posted: 06/18/2026 Req ID: 48793 Faculty/Division: Faculty of Architecture,Landscape&Design Department: Daniels Faculty of Arch., Land & Design Campus: St. George (Downtown Toronto) Description
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(preferably with experience in Python) - good knowledge of analog and digital electronics - knowledge of space design and safety standards - gender and diversity sensitivity Your path to the HU
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Network Engineer (Network and Communications Analyst IV, Range 1) - San Francisco Bay Region Network
open to applicants from SF State, CSU East Bay and Sonoma State Universities.** Working Title Network Engineer SF State University **The primary work location and designated home-campus for this role is
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‐electronics, RF‐electronics) - good knowledge of analog and digital electronics - experience in computer aided design (preferably Autodesk Inventor) - language skills in German and French
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(especially: optics, opto‐mechanics, opto‐electronics, RF‐electronics) - good knowledge of analog and digital electronics - programming skills (preferably Python), databases, data visualization, and
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computer aided design (preferably Autodesk) - programming skills (preferably with experience in Python) - good knowledge of analog and digital electronics - gender and diversity sensitivity
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Experience with the PyTorch framework Experience with analog or full-custom layout Prior tape-out experience in any technology What We Offer We support a wide range of chip design tools required for tape-out