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compute (CPU/GPU), high-speed interconnects, storage and parallel file systems, cluster management, and user-facing platform services. In practice, the Senior HPC Architect drives end-to-end technical
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and service impact, communicating with stakeholders, and ensuring remediation and follow-through in accordance with the ITS major incident process. Engage researchers, other ITS units (e.g. data centers
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institutions. Our mission is to advance the state-of-the-art in critical semiconductor domains such as advanced packaging, and in the process to help restore U.S. leadership in semiconductor manufacturing. We
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modeling group at the forefront of deploying novel computational engineering techniques for problems that are critical to U.S. national and energy security. We utilize our expertise in numerical
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architectural models, system-level simulators, and performance modeling frameworks for QHPC systems, capturing relevant characteristics of quantum processing units, classical HPC resources, interconnects, system
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-generation storage systems and hierarchies, including storage-class memory, disaggregated storage architectures, high-bandwidth parallel file systems, and data movement strategies at leadership scale. Lead
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staff from other groups within NND and ORNL to assure the full expertise of fuel cycle processes are applied to meet sponsor needs. About ORNL: As a U.S. Department of Energy (DOE) Office of Science
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, and parallel computing, with a proven ability to work within highly secure and regulated environments. This role involves close collaboration with security teams, scientists, and IT leadership to ensure
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and qualifications, or as mandated by a U.S. Department of Labor prevailing wage determination. Candidates will be considered across a wide range of research and teaching interests, with priority given
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operating to define the specific characteristics of a given time and place. This course will run in two parallel sections during the fall 2026 semester (late August through December). History of Urban Form