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We are looking for a co-design engineer for future computing architectures in HPC. This position, in a fixed-term contract, is based at the Nano-Innov site of Paris-Saclay, Essonne (91). As part of
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their protection against physical attacks a major challenge. Among these threats, clock glitch attacks remain a powerful and accessible fault injection technique, especially relevant for IoT and embedded systems due
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an innovative technology through the complete development process: Physical modelling → CFD simulation → prototype development → experimental validation → scientific publications and technological innovation
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, leading three ambitious, parallel research axes: pushing model accuracy on systems of several thousand atoms with an IWAE architecture; equipping it with the ability to quantify its own uncertainty — a
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physics, microwave engineering, electrical engineering, physics or a closely related field. The ideal candidate will have: A solid background in plasma physics and/or microwave diagnostics; Experience in
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project is to achieve the integration of quantum devices within Fully Depleted Silicon-On-Insulator (FD-SOI) technology on a 300 mm platform. The success of this integration critically depends
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with a high pulse power device. Another study intends to develop non-thermal electrons distribution which is of trendemous importance for UHI experiments. Durée du contrat (en mois) 2 ans + 2 x 1an