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We are looking for a co-design engineer for future computing architectures in HPC. This position, in a fixed-term contract, is based at the Nano-Innov site of Paris-Saclay, Essonne (91). As part of
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an innovative technology through the complete development process: Physical modelling → CFD simulation → prototype development → experimental validation → scientific publications and technological innovation
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project is to achieve the integration of quantum devices within Fully Depleted Silicon-On-Insulator (FD-SOI) technology on a 300 mm platform. The success of this integration critically depends
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science, electrical engineering, embedded systems, or a related field. Strong candidates will have experience in one or more of the following areas: hardware security and fault injection attacks, formal methods and
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physics, microwave engineering, electrical engineering, physics or a closely related field. The ideal candidate will have: A solid background in plasma physics and/or microwave diagnostics; Experience in
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curious mind who wants to combine cutting-edge generative AI research with concrete impact on a strategic nuclear-energy challenge. #CEA-List ; #Research Engineer Profil du candidat You hold a PhD in