PhD Position Openings in Advanced Circuits and Methods for Heterogeneous Integration

19 Mar 2024
Job Information

Organisation/Company

IPTC

Research Field

Engineering » Electronic engineering

Researcher Profile

First Stage Researcher (R1)

Country

Spain

Application Deadline

8 Apr 2024 - 23:59 (Europe/Madrid)

Type of Contract

Other

Job Status

Full-time

Hours Per Week

37.5

Offer Starting Date

15 Apr 2024

Is the job funded through the EU Research Framework Programme?

European Union / Next Generation EU

Reference Number

Chips for Europe/PERTE

Is the Job related to staff position within a Research Infrastructure?

No

Offer Description

Microelectronics based on silicon CMOS technology has reached extraordinary levels of integration and complexity, while achieving high levels of manufacturing maturity, especially for digital designs. The continuous improvement of high-density circuits driven by Moore’s Law has led to System-on-Chip (SoC) architectures, that integrate more and more functionality onto a single chip. However, the larger size of integrated circuits increases the likelihood of manufacturing defects, resulting in lower performance and significant higher costs. In response to these challenges, the industry is turning to advanced integration and packaging technologies to keep pace with rising processing capabilities.

Recent advances in certain technologies have made chiplets a viable and effective option to help combat the slowdown of Moore's Law. The idea is to divide a complex SoC into multiple smaller chiplets which can provide a potentially more cost-effective and scalable solution. To achieve the functionality and performance of a monolithic SoC, it is critical to have integration technologies that enable high-speed communication between chiplets, even on different technologies. Therefore, there is a clear opportunity for heterogeneous integration and system-level scaling. Additionally, advanced radio frequency (RF) systems, such as 5G-6G wireless communications and automotive radar, use the microwave and millimeter bands (3 GHz-300 GHz) as a means of communication and sensing, placing serious demands on their electronic circuits, with technologies other than silicon. The proposed PhD thesis will contribute to the progress in the design of RF and mixed-signal integrated circuits for their heterointegration into a complex electronic system:

 PhD1: Advanced MMIC design and test (RF).

 PhD2: Design and test of ASICs with scalable architectures and interfaces for high performance.

 PhD3: Development of circuit heterointegration techniques with III-V semiconductors and Si-CMOS.

Requirements

Research Field

Engineering » Electronic engineering

Education Level

Master Degree or equivalent

Skills/Qualifications

 Master’s degree in Electronic/Telecommunication Engineering, or similar degrees.

 Experience in design tools (Cadence, Synopsys, ADS) is highly desirable.

 Good academic record

 Full proficiency in English.

Languages

ENGLISH

Level

Excellent

Additional Information
Benefits

 The selected candidate would start her/his PhD in our group, hired from a research project in the context of the UPM-Indra Chair (industrial PhD) with an expected duration of 3 to 4 years.

 Excellent experimental infrastructure and international atmosphere.

 Attendance to scientific conferences worldwide

 Research stays in partner labs in Europe, Japan or the USA

Work Location(s)

Number of offers available

3

Company/Institute

Technical University of Madrid

Country

Spain

State/Province

Madrid

City

Madrid

Postal Code

28040

Street

Avda. Complutense 30

Where to apply

E-mail

[email protected]

Contact

City

Madrid

Website

https://iptc.upm.es

Street

Av. complutense, 30

E-Mail

[email protected]

STATUS: EXPIRED