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Electrical Engineering or Information Technology or similar Experience in Physical Implementation in leading edge CMOS technologies Basic knowledge of state-of-the-art synthesis, P&R and verification tools
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Research Infrastructure? No Offer Description Job Description: Design and layout IC-Packages using State-of-the-Art tools and technologies Physical Co-Design of IC packages (bump and pad-ring planning
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to the customers’ needs with focus on realization of complex System-on-Chips in leading edge technology nodes. Our team of more than 100 employees covers the complete chip design process up to system architecture
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edge technology nodes. Our team of more than 100 employees covers the complete chip design process up to system architecture development. Racyics is working for major German and international semi-custom
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ramp-up Support methodology team with proposals and implementation of flow and methodology enhancements Requirements: Bachelor’s/Master’s Degree in Electrical Engineering or Information Technology