Research Fellow (104666-1021)

Updated: over 2 years ago
Location: Warwick, ENGLAND
Deadline: 11 Nov 2021

Vacancy Type/Job category
Research Only
Department
School of Engineering
Salary
£31,406 - £40,927 per annum
Location
University of Warwick, Coventry
Vacancy Overview
The anticipated start date for this post is 1st January 2022. The successful candidate will be offered a contract for 24 months. 36.5 hours per week.
The School of Engineering is seeking a Research Fellow to assist the Principal Investigator (Dr Vishal Shah) and the project collaborators in the successful execution of the project: TESiC-SuperJ - Trench Epitaxy for SiC Superjunctions (EPSRC number EP/W004291/1). The aim of the project is epitaxial growth, materials characterisation, device design and fabrication for SiC superjunction materials and devices.
You will play a major leading role in this project, and in the many other projects of the group, particularly developing semiconductor fabrication techniques, epitaxy and materials characterisation of semiconductor materials. You will help to manage the activities at Warwick, working as part of a small team including three academics specialising in material growth, SiC device design and fabrication whilst mentoring a new PhD student on this same project. You will also be responsible for communicating with and managing work from the project partners, who are LPE Spa, Oxford Instruments Plasma Technology, Hitachi ABB Power Grids, Clas-SiC Wafer Fab Ltd and NovaSiC all leaders in their own specialist fields.
You will design experiments and perform them using laboratories in Warwick and elsewhere. You will process samples in our epitaxial and cleanroom facility, which includes state-of-the-art thin film deposition, atomic layer deposition, annealing furnaces, and lithographic facilities. You will characterise materials by techniques such as CV measurements SEM, TEM and Hall/VdP. You may help to develop new characterisation techniques like c-AFM or XRT with partners or using national facilities (e.g. Diamond Light Source).
This post is based at the University of Warwick. The successful candidate will be required to make occasional trips to collaborators/ specialist research facilities, so the willingness to travel occasionally is required. There will be opportunities for presenting work at international conferences when travel restrictions allow this.
You will be expected to write up research for publication. You will be expected to deal with any management/ administration problems that may arise.
SKILLS AND EXPERIENCE
You will have a PhD or equivalent in a relevant discipline (including a relevant branch of Materials Science/ Physics/ Electronic Engineering/ Electrical Engineering). You will possess experimental research skills relevant to semiconductor materials and devices. Prior experience with epitaxy, materials characterisation and other doping related extraction techniques will be considered advantageous.
It is desirable that you have an ability to teach, train and mentor junior researchers.
Applications from candidates in groups under-represented in the Engineering sector are particularly welcome.
The University aims to promote work life balance for all employees and the School of Engineering will consider a range of possible flexible working arrangements in order to recruit the best candidate.
If you have not yet been awarded your PhD but are near submission or have recently submitted your PhD, any offers of employment will be made as Research Assistant on level 5 of the University grade structure (£30,497. Upon successful award of your PhD and evidence of this fact, you will be promoted to Research Fellow on the first point of level 6 of the University grade structure (£31,406 pa).
Interview Date: TBC
Job Description
JOB PURPOSE:
To conduct experimental research on silicon carbide materials. To work with project members to ensure the goals of the project are met and to generate ideas for new avenues of enquiry.
DUTIES & RESPONSIBILITIES:
To take a leading role in the either the development of SiC trench/selective epitaxy or SiC superjunction device fabrication. This will include (either/or)
a. Leading the projects’ semiconductor device fabrication using techniques such as metallisation, dry etching, annealing, wet chemistry, deposition, lithography etc.
b. Leading the projects’ semiconductor trench/selective epitaxy and materials characterisation, such as SEM, TEM, AFM, Hall, c-CFM etc.
2. To work with members of the project team, and independently, to identify other pertinent research issues in the area of silicon carbide materials and devices.
3. To establish an experimental plan to study key issues identified, taking into account the resources currently available and those that can be accessed during the project.
4. To perform other exploratory research into silicon carbide materials and devices, including preparing samples, making measurements, and analysing data.
5. To identify and take advantage of opportunities for collaboration (in Warwick, elsewhere in the UK, and internationally) in order to access specialist equipment, and to work with collaborators on joint research projects.
6. To publish research outcomes in well-respected journals with an international readership.
7. To disseminate research findings at conferences, workshops and meetings online, in the UK, and internationally.
8. To update personal technical knowledge and understanding on a continual basis, and to use this knowledge to initiate new areas of research activity.
9. To contribute to the preparation of proposals and applications to external bodies to support a developing research agenda.
10. To protect any intellectual property arising from the project appropriately, and to assist in the management and exploitation of intellectual property.
11. To assist in the supervision of student projects and the development of student research skills.
12. To assist the investigators with project administration issues, including the preparation of progress reports and presentations.
13. To be a collegial member of Widebandgap Materials and PEATER groups supporting other group members in achieving their own research objectives.
Administration and Other Activities
1. To contribute to School of Engineering committees and administrative duties and tasks.
2. Work within budget constraints.
3. To ensure compliance with Health and Safety, and other University regulations and good working practices in all aspects of work.
The duties and responsibilities outlined are for guidance on the main aspects of the job. The post holder will be expected to be flexible in their duties. Occasional weekend, evening and overseas working may be required, in turn the School offers flexible working where possible.

Person Specification

The Person Specification focuses on the knowledge, skills, experience and qualifications required to undertake the role effectively. This is measured by (a) Application Form, (b) Test/Exercise, (c) Interview, (d) Presentation.


Essential Criteria 1
Good honours degree or equivalent in a relevant subject, including, but not limited to, Physics, Materials Science or Electronic/ Electrical Engineering. (a)
Essential Criteria 2
A PhD or equivalent in a relevant discipline including, but not limited to, a relevant branch of Materials Science, Physics or Electronic/ Electrical Engineering. (a)
Essential Criteria 3
Proven ability in research and evidence of high quality research output in a relevant field, commensurate with career stage. (a,c,d)
Essential Criteria 4
Experimental research expertise in a relevant field such as epitaxy, semiconductor materials research or semiconductor electronic device simulation and fabrication. (a,c,d)
Essential Criteria 5
Proven ability in using relevant experimental techniques to fabricate or characterise semiconductor materials and devices, and a willingness to learn new techniques relevant to the project. (a,c,d)
Essential Criteria 6
Proven ability to work in a semiconductor laboratory environment and to perform systematic and well-controlled studies on high purity semiconductor materials. (a,c,d)
Essential Criteria 7
Demonstrable ability to work collaboratively and effectively with academic and administrative colleagues, including those external to the University, to promote and contribute towards a collegial environment. (a,c)
Essential Criteria 8
Good IT skills and proven ability to use IT to write technical research papers and presentations. (a,c,d)
Essential Criteria 9
Able to evidence excellent interpersonal skills with relevant experience of working independently and as part of a team. (a,c,d)
Essential Criteria 10
Able to evidence strong time management and organisational skills. (a,c,d)
Essential Criteria 11
Strong communication skills including the ability to communicate effectively in English, both verbally and in writing. (a,c,d)
Essential Criteria 12
Understanding of equal opportunity issues as they may impact on areas of research content. (a,c)
Desirable Criteria 1
Proven ability to work in a semiconductor cleanroom environment, including performing well-controlled wet chemical processing of high purity semiconductor materials and/ or epitaxial growth. (a,c,d)
Desirable Criteria 2
An interest in and/ or prior experience with the key challenges associated with the development of selective or trench epitaxy (a,c,d)
Desirable Criteria 3
Experience with advanced dopant measurement techniques (e.g. c-AFM, Hall/VdP, eCV etc), or, experience in materials or device research with other wide bandgap materials, such as GaN, Ga2O3, Diamond etc. (a,c,d)
Desirable Criteria 4
Knowledge of relevant concepts in semiconductor materials/ physics, including an understanding of widebandgap power electronics and experience with device simulation of power electronics devices (e.g. TCAD, Silvaco, Centaurus). (a,c,d)
Desirable Criteria 5
An interest in and/ or prior experience with performing experimental work at large-scale national facilities (e.g. ISIS or Diamond in the UK, or internationally). (a,c,d)
Further Particulars
This fixed term postdoctoral position is supported by a recently awarded project “TESiC-SuperJ - Trench Epitaxy for SiC Superjunctions” (EPSRC number EP/W004291/1)
The applicant will work with an associated PhD student and Dr Shah with other academics in the PEATER group (Prof. Gammon and Dr Antoniou) in SiC materials and devices for power electronics.
Superjunction (SJ) technology has the potential to revolutionise Silicon Carbide (SiC) power electronics, as it did in silicon in the early 2000s. Early publications of SJ MOSFET device simulation demonstrate its advantages, demonstrating up to a 10x reduction in static losses compared to regular SiC MOSFETs of a similar rating. Yet, the fabrication methodology must be advanced if this is to become a mainstream technology. Conventional SJ construction in Silicon-only devices is accomplished through dopant diffusion but is not possible in SiC due to the material’s low diffusion coefficients. In this proposal, a fabrication methodology is to be developed involving the backfilling of trenches with epitaxy, which will not only enable the technology, but also reduce relative costs and fabrication steps compared to a diffusion-based approach.
In this project, a SiC trench refill method will be developed, in order to demonstrate a class of world-first, ≥6.5 kV SiC full-SJ power devices. Using this methodology, these structures will be compatible with state of the art SiC mass production, allowing scaling for high current, advanced device testing and system integration. The industrial partners on the project include LPE Spa, NovaSiC, Oxford Instruments Plasma Technology and Hitachi ABB Power Grids.
The School of Engineering (SoE) at Warwick University (UoW) is the ideal place to carry out this kind of power electronics research. The University hosts the UK’s only industrial epitaxial SiC CVD reactor, a £2.6m facility, in an ISO class 4 cleanroom. Funded by EPSRC as part of the Centre for Power Electronics, the CVD reactor is used to grow the semiconductor layers of the device on the surface of the original SiC substrate (wafer). The facility can produce defect free, precisely controlled p- and n-doped SiC layers for use in high voltage blocking voltage devices. These materials are then characterised using UoW’s £24m materials and analytical sciences Research Technology Platform (RTP) with state-of-the-art electron microscopy, AFM and X-ray diffraction facilities. Its nationally unique facilities make the university one of very few institutions in Europe to house a dedicated SiC cleanroom, as well as an exhaustive list of simulation, packaging, and characterisation facilities. The £3m state-of-the-art cleanroom is home annealing and oxidation furnaces, photolithography, TEOS SiO2 deposition, RIE/ICP etching, metal deposition and atomic layer deposition tools. At UoW a dedicated 10kV, 100A, parameter analyser is coupled to an automatic wafer prober. Alongside this, other more materials-specific techniques such as DLTS, uPCD, KOH etching and Hall measurement exist in a newly fabricated £300k “Wide Bandgap Semiconductor Characterisation Laboratory”.
Funding is available for up to 24 months in the first instance. Informal enquiries can be made to Dr. Vishal Shah ([email protected]). Candidates should be willing to participate in an online interview if necessary. Shortlisted candidates will be asked to make a presentation as part of the interview.
For further information about the University of Warwick, please read our University Further Particulars .
For further information about the department, please visit the departmental website .
Athena SWAN
The School of Engineering is committed to the principles of the Athena SWAN Charter, which recognises work undertaken to address gender equality, representation and progression for all staff working in an academic environment. The School currently holds the Athena SWAN Silver award and the University holds an Institutional Silver award. Further information about the work of the School in relation to Athena SWAN can be found at the following link; https://warwick.ac.uk/fac/sci/eng/about/athenaswan/
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The University of Warwick provides an inclusive working and learning environment, recognising and respecting every individual’s differences. We welcome applications from individuals who identify with any of the protected characteristics defined by the Equality Act 2010.

Recruitment of Ex-Offenders Policy

As an organisation using the (DBS) Disclosure and Barring Service to assess applicants’ suitability for positions of trust, the University of Warwick complies with the DBS Code of Practice and undertakes not to discriminate unfairly against any subject of a Disclosure on the basis of a conviction or other information revealed. More information is available on the University’s Vacancy pages and applicants may request a copy of the DBS Code of Practice.


Closing Date
11 Nov 2021

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