VLSI System Engineer

Updated: 3 months ago
Job Type: FullTime
Deadline: 15 Nov 2020

We offer one position for a student in Mixed-signal VLSI designer and microsystem integration.

The core idea of this project is to produce an ASIC to control, drive, measure and communicate the project sensors. The development combines accurate analog control and measurement, wireless communications and strong low-power requirements.

The person will be dedicated to

  • Contact with the foundry for the selected process
  • Analog, digital and mixed-signal design of the ASIC/s
  • Integration of the ASIC with off-the-shelf components and the sensor
  • Support in integrated wireless communications

Experience is required managing all the EDA tools of Cadence, including schematics, simulation, layout and verification. Programming of FPGA could be necessary for the testing of the device.

Acronym

FOXES (H2020-FET Proactive contract 951774)

Fons

Project title

Fully Oxide-based Zero-Emission and Portable Energy Supply

IP

Juan Daniel Prades

Department

Departament d'Enginyeria Electrònica i Biomèdica

Gross salary per year 16.800€

Required documents

Application letter, Curriculum vitae.

Send your application to:

email

dprades@ub.edu

Name

J. Daniel Prades

email subject

FOXES VLSI System Engineer


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