RTL engineer for an out-of-order processor and accelerators (RE2)

Context And Mission

The eProcessor EuroHPC project combines open source software (SW)/hardware (HW) to deliver the first completely open source European full stack ecosystem based on a new RISC-V CPU, coupled to multiple diverse accelerators that target traditional HPC and extend into mixed precision workloads for High Performance Data Analytics (HPDA), (AI, ML, DL and Bioinformatics). eProcessor will be extendable (open source), energy-efficient (low power), extreme-scale (high performance), suitable for uses in HPC and embedded applications, and extensible (easy to add on-chip and/or off-chip components).

eProcessor combines cutting edge research utilizing SW/HW co-design to achieve sustained processor and system performance for (sparse and mixed-precision) HPC and HPDA workloads by combining a high performance low power (architecture and circuit techniques) out-of-order processor core with novel, adaptive on-chip memory structures and management, as well as fault tolerance features. These software-hardware co-design solutions span the full stack from applications to runtimes, tools, OS, and the CPU and accelerators. This can only be done with a combination of SW simulation, HW emulation using FPGAs, and real ASIC prototypes that demonstrate the full stack feasibility of the hardware and software, in a modern technology node that can easily be adopted for a near-future HPC implementation.

We are seeking talented and motivated professionals with expertise in processor architectures, RTL design and IP integration, towards an ASIC target to be taped out.

Key Duties

• You will use your design expertise to design and build complex digital designs focused on OoO processors, vector units, and other accelerators.
• You will collaborate closely with design architects and verification engineers and perform hands-on design, writing RTL code.
• Design integration, logic synthesis and design optimization for area, timing and power.
• Participating in chip bring-up and testing.

Requirements

Education

• Computer / Electrical Engineering degree or equivalent level of professional experience.

Essential Knowledge and Professional Experience

• Knowledge of RTL Design, logic synthesis and timing closure.
• Proficiency in Verilog/VHDL/SystemVerilog is required.
• Modern out-of-order processor core and accelerator designs, with experience in one or more of the following areas: fetch, decode, branch prediction, renaming and scheduling, out-of-order execution, re-order buffer, integer, and floating-point execution, vector execution, load/store execution, caches, and memory subsystem.
• Previous experience with modern Instruction Set Architectures (ISAs), including RISC-V and their implementation within processor cores.
• Agile development and open source development, deployment, and support, including GitHub or equivalent.

Additional Knowledge and Professional Experience

• Strong scripting/programming in C/C++, Tcl, Python, Perl/Csh is a plus.
• Familiarity with Mentor, Synopsys, Cadence, Xilinx, and other EDA tools.
• Strong analytics skills, experience with DSPs, MCUs, FPGAs, SoC, and low-power design will be considered a plus.
• DLP (GPU/SIMD/Vector) hardware development expertise is a big plus.

Competences

• Fluency in English is essential, Spanish is welcome.
• Effective communication, multitasking, and working well on collaborative designs
• Keeping abreast on technology trends.
• Ability to think creatively.
• Ability to work independently and make decisions.
• Ability to take initiative, prioritize and work under set deadlines and pressure.

Conditions

• The position will be located at BSC within the Computer Sciences Department
• We offer a full-time contract, a good working environment, a highly stimulating environment with state-of-the-art infrastructure, flexible working hours, extensive training plan, tickets restaurant, private health insurance, fully support to the relocation procedures
• Duration: Temporary - end eProcessor project renewable
• Salary: we offer a competitive salary commensurate with the qualifications and experience of the candidate and according to the cost of living in Barcelona
• Starting date: 1/1/2022