4 Apr 2024
Job Information
- Organisation/Company
UNIVERSIDAD POLITECNICA DE MADRID- Department
Centro de Electrónica Industrial (CEI) / Grupo en Tecnología Electrónica Aplicada (GTEA)- Research Field
Engineering » Electronic engineering- Researcher Profile
First Stage Researcher (R1)- Country
Spain- Application Deadline
17 Apr 2024 - 20:00 (Europe/Madrid)- Type of Contract
Permanent- Job Status
Full-time- Hours Per Week
37,5- Offer Starting Date
1 May 2024- Is the job funded through the EU Research Framework Programme?
Not funded by an EU programme- Is the Job related to staff position within a Research Infrastructure?
No
Offer Description
- Development of compiler tools for RISC-V architectures with custom ISA extensions.
- Development of hardware accelerators for DSP and neuromorphic algoritms, integrated with RISC-V cores.
- Development of algorithm-to-hardware mapping mechanisms over regular computing structures (e.g., CGRAs).
Requirements
- Research Field
- Engineering » Other
- Education Level
- Master Degree or equivalent
- Research Field
- Computer science » Other
- Education Level
- Master Degree or equivalent
Skills/Qualifications
Master degree on Electrical and Electronics Engineering, Computer Engineering or Computer Science.
Previous experience with high-level programming languages and toolchains.
Previous experience with RISC-V architectures.
Specific Requirements
- Embedded systems programming with C/C++.
- Basic competence on (parallel) computer architecture and digital system design with HDLs.
- Notion on RISC-V ISA and the intergration of custom accelerators.
- Languages
- ENGLISH
- Level
- Excellent
- Languages
- SPANISH
- Level
- Excellent
- Research Field
- Engineering » Electronic engineering
- Years of Research Experience
- 1 - 4
Additional Information
Benefits
The contract includes a gross salary of 24000 € over 12 payments, and full social benefits in Spain. The salary level is competitive for the current situation in Madrid. Conference, summer school and workshop registration fees will be also covered.
Selection process
Se aplican las pautas establecidas en el proceso de selección del nuevo Reglamento para el proceso de selección y contratación del personal investigador, personal técnico y personal gestor relacionado con la investigación de la Universidad Politécnica de Madrid, aprobado en la UPM.
- Previous experience and knowledge on RISC-V and accelerator's extensions.
- Previous experience and knowledge on embedded systems programming with C/C++.
- Previous experience on IP design in VHDL and/or SystemVerilog.
Additional comments
El contrato es vinculado al proyecto PCI2022-135077-2, financiado por MCIN/AEI/10.13039/501100011033 y por la Unión Europea “NextGenerationEU”/PRTR»
Work Location(s)
- Number of offers available
- 1
- Company/Institute
- entro de Electrónica Industrial (CEI)
- Country
- Spain
- State/Province
- Madrid
- City
- Madrid
- Postal Code
- 28006
- Street
- C/ José Gutiérrez Abascal, 2
- Geofield
Where to apply
[email protected]
Contact
- State/Province
Madrid- City
Madrid- Website
https://www.upm.es/- Street
C/ Ramiro de Maeztu, 7- Postal Code
28040
[email protected]
STATUS: EXPIRED
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