1 Sep 2026
Job Information
- Organisation/Company
UNIVERSIDAD POLITECNICA DE MADRID- Department
HRS4R- Research Field
Engineering » Electronic engineering- Researcher Profile
First Stage Researcher (R1)- Positions
Master Positions- Application Deadline
14 Sep 2026 - 23:00 (Europe/Madrid)- Country
Spain- Type of Contract
Permanent- Job Status
Full-time- Hours Per Week
37,5- Offer Starting Date
1 Sep 2026- Is the job funded through the EU Research Framework Programme?
Not funded by a EU programme- Is the Job related to staff position within a Research Infrastructure?
No
Offer Description
- Design of mixed-signal modules for interfacing RRAM memories.
- Modeling of computation in memory circuits.
- Reliability of memristor-based systems.
Where to apply
[email protected]
Requirements
- Research Field
- Engineering
- Education Level
- Master Degree or equivalent
- Research Field
- Computer science
- Education Level
- Bachelor Degree or equivalent
Skills/Qualifications
Students of a master degree on Electrical and Electronics Engineering, Telecommunication or
similar.
Specific Requirements
- Background on design of mixed-signal circuits.
- Valuable knowledge of comercial design tools like Cadence / Synopsys, ADS.
- Competence in emerging technologies and non-volatile devices.
- Languages
- ENGLISH
- Level
- Excellent
- Languages
- SPANISH
- Level
- Excellent
- Research Field
- Other
- Years of Research Experience
- 1 - 4
Additional Information
Benefits
Continuous training in mixed-signal circuit design.
Use of emerging technologies for in memory computing.
Eligibility criteria
Se aplican las pautas establecidas en el proceso de selección del nuevo Reglamento para el proceso de selección y
contratación del personal investigador, personal técnico y personal gestor relacionado con la investigación de la
Universidad Politécnica de Madrid, aprobado en la UPM.
Continuous training in mixed-signal circuit design.
Use of emerging technologies for in memory computing.
- Academic records at bachelor's level.
- Previous experience in the design of electronic circuits.
- Level of compliance with the specific requirements.
Additional comments
Proyectos de I+D+i «Generación de Conocimiento»
Work Location(s)
- Number of offers available
- 1
- Company/Institute
- Information Processing and Telecommunication Center (IPTC), ETSI Telecomunicación,
- Country
- Spain
- State/Province
- MADRID
- City
- MADRID
- Postal Code
- 28040
- Street
- Avenida Complutense, 30
- Geofield
Contact
- State/Province
Madrid- City
Madrid- Website
https://www.iptc.upm.es/- Street
C/ Ramiro de Maeztu, 7- Postal Code
28040
[email protected]
STATUS: EXPIRED
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