Clean Room Engineer for III-V semiconductor device processing

Updated: 2 months ago
Job Type: FullTime
Deadline: 03 Oct 2022

g2-Zero, a spin-off of the Institute of Micro and Nanotechnology of the National Spanish Research Council (IMN-CSIC)

and the Technical University of Madrid (UPM), has a position for a clean room enginneer to be filled by October 16th, 2022.

He or she will join an international team of junior and senior research engineers and physicists developing Plug&Play single-photon

sources for the emergent quantum technologies market. The main tasks comprise the development of manufacturing processes for scaling up the fabrication of these devices.

Main Tasks and Responsibilities:

● Fabrication of III-V semiconductor devices using UVL, EBL, PE-CVD, ICP-RIE etc.

● Development of III-V microplanar fabrication recipes and processes.

● Design of mask layouts using K-Layout

Minimum Qualifications:

● Chemistry, Physics or Engineering Master Degree or equivalent.

● Candidates with a Bachelor degree might be considered depending on actual working experience

Required knowledge and professional experience:

●Proven experience (2-4 years) with the manufacturing of III-V or Silicon based semiconductor/photonic devices using UV/EBL lithography, dry/wet etching, and metal/dielectric evaporation techniques.

● Proficiency in mask layout design using K-Layout scripting language

Other skills:

● Experience in Semiconductor Packaging and Outsourced Semiconductor Assembly and Test will be positively considered


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