As part of a multidisciplinary technology research team of experts in hardware IP design and design tools, you will be involved in national and European research projects aimed at expanding and maturing the European RISC-V ecosystem to strengthen Europe's sovereignty. In particular, the team is involved in extra-functional properties assessment (such as power, performance) during the early design stage of system-on-chips, guiding architectural choices.
Your main tasks will be to:
- Evaluate the existing state-of-the-art open source solutions for modeling and virtual prototyping of RISC-V HW platforms.
- Analyze specifications and features of SoCs (System-On-Chips), including RISC-V processors, memory hierarchies and peripherals.
- Design innovative methodologies, including machine learning-based modeling, to extend existing simulation platforms with performance evaluation capabilities.
- Deliver the next generation of simulation methodologies and tools.
You are expected to:
- Collaborating with R&D partners (research and industrial organizations).
- Contributing to the scientific dissemination of the team's research results (publications in international conferences) and fostering innovation (through patents).
- Participating in international scientific events (conferences, workshops) as part of the scientific community.
#LI-IB1
You have a PhD or a Master's degree in Computer Science, Electronics, Embedded Systems, or equivalent.
You have an experience in Computer Architecture and knowledge of digital electronic architectures (processors, caches, network-on-chips, etc.).
You must have acquired the following technical skills:
- Experience in C/C++ and Python programming languages
- Experience with simulation platforms, in particular QEMU, Spike or SystemC/TLM-based environments
Experience with Embedded Linux would be a plus.
RISC-V, virtual prototyping, QEMU, SystemC/TLM, Machine Learning, EDA, SoC design
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