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, Estonia. Additional details of the positions Starting date: The position is expected to start during 2026. Trial period: 6 months Target degree: Doctoral degree from Aalto University, Finland Approximate
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, Microelectronics, Computer Engineering, or a closely related field, completed by the start of the position Have a solid background in digital hardware design: Verilog/SystemVerilog RTL, logic synthesis, and place
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excellent study records in Electrical Engineering, Electronics, Microelectronics, Computer Engineering, or a closely related field, completed by the start of the position Have a solid background in digital
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