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ASIC implementation. You will carry out system modelling, design novel parallel processor architectures at the RTL level (using Verilog/SystemVerilog or VHDL), and drive the hardware-software co-design
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discipline. 2. Have or be about to obtain, a PhD in a relevant subject. 3. Have relevant research experience in either embedded systems design or FPGA or ASIC hardware design, along with demonstrable expertise
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University of North Carolina at Chapel Hill | Chapel Hill, North Carolina | United States | about 15 hours ago
emphasize computer architecture, processor and accelerator design, embedded and real-time systems,hardware-software co-design, intelligent medical devices, low-power VLSI/ASIC design, or neuromorphic and
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on the design and experimental characterization of Application-Specific Integrated Circuits (ASICs), devices, and systems for the detection, spectroscopy, and imaging of radiation and particles, applicable
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systems Computer science » Programming Computer science » Computer systems Engineering » Electronic engineering Computer science » Systems design Researcher Profile First Stage Researcher (R1) Recognised
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projects. Digital VLSI and AI Hardware Systems Key research areas: ASIC/FPGA design flows; AI/edge accelerators; hardware–software co-design; modern SoC architectures; verification and architecture
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projects. Digital VLSI and AI Hardware Systems Key research areas: ASIC/FPGA design flows; AI/edge accelerators; hardware–software co-design; modern SoC architectures; verification and architecture
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Multiple Tenure-Track Assistant Professor Positions in Microelectronics, Circuits and Systems Design
laboratory modules; mixed-signal design projects. Digital VLSI and AI Hardware Systems Key research areas: ASIC/FPGA design flows; AI/edge accelerators; hardware–software co-design; modern SoC architectures
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Multiple Tenure-Track Assistant Professor Positions in Microelectronics, Circuits and Systems Design
laboratory modules; mixed-signal design projects. Digital VLSI and AI Hardware Systems Key research areas: ASIC/FPGA design flows; AI/edge accelerators; hardware–software co-design; modern SoC architectures
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research expertise in RISC-V architecture, processor microarchitecture, and AI accelerators. Experience with ASIC design methodologies and open-source IC design and EDA tools. Proven experience in digital