3 Design positions at Ecole Centrale de Lyon in PhD in France

PhD Ferroelectric Transistors (FeFET) Aware Logic Synthesis

and the dielectric capacitance determines the FeFET operation mode. This thesis aims at studying Both n- and p-type FeFET transistors based on real physical devices [2]. The first goal is to design a

PhD - Towards efficient analysis and synthesis of Heterogeneous Interconnected Systems : application to signal estimation

few years, the advisors have been working on the possibilities offered by Systems, Control and Signal approaches for the development of methods for the design/understanding of systems from different

PhD Project DAC Analysis and synthesis of Anomaly Detectors under Critical-time constraints

few years, the advisors have been working on the possibilities offered by Systems, Control and Signal approaches for the development of methods for the design/understanding of systems from different