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which are used across several of the programs at IMEC. Determine the optimal processes and conditions to provide consistently effective results, utilizing windowing and process margin understanding
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will work closely with the device design, characterization and process development engineers and be responsible for defining and implementing the process options enabling Laser co-integration with Si
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to evaluate defect results of window and margin test for modules. Feedback to help Integration and process to establish optimal settings which work across major program families which are inherently dissimilar
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developing new processes and for looking into the sustainability aspects of process step development. The team currently consists of ~12 people with whom you interact daily. However, you will also work in a
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correlate your results to other characterization methods and to the advanced process and device technology. Requirements Research FieldEngineeringEducation LevelMaster Degree or equivalent Research
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) was explored and demonstrated some doping effect, however these methods are unstable with time and temperature, difficult to control and/or impossible to integrate within a CMOS process flow. Substitutional
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. You are a team player, who can also work independently. You can process a lot of information in a short time, and you convince with arguments. You are result-driven and handle files in an efficient and
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programs and funding policy (VLAIO, European Commission,...). Ideally, you already have experience as a funded project manager. You are a team player, who can also work independently. You can process a lot
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1 Mar 2024 Job Information Organisation/Company IMEC Research Field Physics » Quantum mechanics Engineering » Computer engineering Researcher Profile Recognised Researcher (R2) Established
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limits due to the continuous downscaling of the physical size of devices and wires to the nanometer scale. The miniaturization of circuits seems to have reached a possible halt, since transistors can only