RTL Engineers

Updated: 2 months ago
Deadline: 31 Mar 2024

21 Feb 2024
Job Information
Organisation/Company

Semidynamics
Research Field

Computer science » Computer architecture
Researcher Profile

Leading Researcher (R4)
First Stage Researcher (R1)
Established Researcher (R3)
Country

Spain
Application Deadline

31 Mar 2024 - 00:00 (UTC)
Type of Contract

To be defined
Job Status

Negotiable
Is the job funded through the EU Research Framework Programme?

Not funded by an EU programme
Is the Job related to staff position within a Research Infrastructure?

No

Offer Description

We're looking for individuals with either a strong RTL or a strong architecture/microarchitecture background interested in working in several areas of a RISC-V design for an advanced technology node. In particular, areas of focus will be the processor pipeline, d-cache, i-cache, the l2-pipeline and a custom memory controller. We believe in very “vertical” engineers that fully understand the problem to be solved and can take it down to RTL level.

What we offer? Flexible work schedules, competitive pay, a highly learning environment, and opportunities for advancement. Come and join us in the beautiful city of Barcelona!. Candies, coffee and free spanish lessons included!. (Visa sponsorship if required)


Requirements
Additional Information
Website for additional job details

https://www.hipeac.net/jobs/14539/rtl-engineers/

Work Location(s)
Number of offers available
5
Company/Institute
Semidynamics
Country
Spain
City
Barcelona
Geofield


Where to apply
Website

https://semidynamics.com/en/career-offer/vnyhgzlvrboywtzn

Contact
Website

http://www.semidynamics.com/
E-Mail

[email protected]

STATUS: EXPIRED

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