Applicants must have a PhD in Computer Engineering, Computer Science, or Electrical and Computer Engineering, and have published their research in prestigious conferences and journals in related topics.
Candidates should have some experience working with FPGAs as well as an understanding of computer networks. Experience with both RTL and HLS design is favoured. The ideal candidate would have some experience working with FPGA-based networking platforms/frameworks such as NetFPGA, Corundum, Xilinx OpenNIC, or the ETHZ HLS TCP/IP Stack. Familiarity with Software Defined Networking, SmartNICs, RDMA is an advantage.
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