9 Mar 2024
Job Information
- Organisation/Company
Racyics- Research Field
Computer science » Other- Researcher Profile
Established Researcher (R3)- Country
Germany- Application Deadline
31 Dec 2024 - 00:00 (UTC)- Type of Contract
To be defined- Job Status
Negotiable- Is the job funded through the EU Research Framework Programme?
Not funded by an EU programme- Is the Job related to staff position within a Research Infrastructure?
No
Offer Description
Job Description:
Design and layout IC-Packages using State-of-the-Art tools and technologies
- Physical Co-Design of IC packages (bump and pad-ring planning)
- Bonding diagram generation for wirebond packages
- Scripting and design automation
Perform signal and power integrity simulations within the system, including the PCB and IC-Package
- Extract models of PCB and IC-package using 3D/2D EM simulations
- Generate models of IC-interfaces for fast electrical signal and power integrity simulations
- Work in close cooperation to our chip design teams to ensure system level signal and power integrity
- Develop scripts for post-processing of simulation data
Document and report your results
Requirements:
- Bachelor’s/Master’s degree in Electrical Engineering, Communications Engineering, Information Technology or equivalent
- Knowledge in printed circuit board layout and manufacturing
- Knowledge in time and frequency domain modelling
- Knowledge in scripting for design automation (e.g. Python / Perl / TCL / VBA) would be a plus
- Self-Driven and hands-on way of working
- Strong analytical and solution-oriented thinking
- Good written and oral communication skills in English and German
- Team-player
Knowledge in any of these tools would be a plus:
- Cadence Allegro, Cadence APD, Mentor Xpedition, Altium Designer
- CST Studio Suite, Ansys HFSS, Ansys Q3D, Ansys SIwave, Cadence Sigirty
- Cadence Virtuoso
About us
Racyics® is Europe’s leading design service provider for mixed-signal system-on-chip design and turnkey services in advanced nodes.
We deliver professional analog, digital and mixed-signal design services tailored to the customers’ needs with focus on realization of complex System-on-Chips in leading edge technology nodes. Our team of more than 100 employees covers the complete chip design process up to system architecture development. Racyics is working for major German and international semi-custom companies both as a service provider and in collaborative partnerships.
Working at Racyics comes with many benefits, including flexible working hours, mobile work, a financial contribution to your childcare costs and great team events.
Contact
Send us a mail with your CV incl. your certificates, transcripts etc. attached to [email protected] . Please mind that we can only consider attachments in PDF format.
Requirements
Additional Information
- Website for additional job details
https://www.hipeac.net/jobs/14584/ic-package-design-engineer/
Work Location(s)
- Number of offers available
- 1
- Company/Institute
- Racyics
- Country
- Germany
- City
- Dresden
- Geofield
Where to apply
- Website
https://racyics.de/career/
Contact
- City
Dresden- Website
https://racyics.de/
[email protected]
STATUS: EXPIRED
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